Analyzing and designing control system for three phase inverter for photo voltaic application based on fpga
This thesis designed a control system for three-phase inverter system based on Field Programmable Gate Array (FPGA). FPGA generated three-phase Sinusoidal Pulse Width Modulation (SPWM) signals to control the three-phase Voltage Source Inverter (VSI) system which consists of six Insulated-Gate Bipolar Transistors (IGBTs) in configuration with gate driver module. The three-phase inverter system output is three-phase Alternating Current (AC) voltages in sinusoidal waveform with frequency of 50 Hz. This thesis proposed Digital Phase Locked Loop (DPLL) for synchronization between the three-phase inverter system output and the electric grid by using FPGA. The experiments showed that the methods have successfully controlled the output of the three-phase inverter system and synchronized the output with the electric grid with output voltage phase locked at the grid frequency of 50 Hz. The experiments also showed that output voltage of inverter system was stable and had low Total Harmonics Distortion (THD) value. A low pass filter is provided in order to have smooth inverter system output voltage waveform by reducing its harmonic frequency.
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